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MKY43 CUnet Master/Slave IC

This is a master and slave IC compatible with CUnet. It can be connected to the CPU using an 8 or 16-bit bus for your use.

【512-byte Shared Memory】 The 512-byte shared memory consists of 64 blocks (1 block is 8 bytes). This 512-byte shared memory is composed of a "self-occupied area" that can only be written to by the CPU connected to the self (CUnet IC) and an area where input data from other CUnet ICs is copied. 【Buffer for Mail Function】 The buffer for the mail function consists of two receive buffers and one send buffer, each of which is 256 bytes. 【Communication Control Register】 This is a register that controls communication such as starting communication, error checking, and sending and receiving mail. By simply accessing this register, it is possible to easily control CUnet communication. Additionally, the MKY43 has two interrupt terminals. It realizes various interrupt functions such as shared memory update interrupts, mail sending interrupts, mail receiving completion interrupts, specific terminal participation interrupts, specific terminal departure interrupts, and communication error occurrence interrupts.

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MKY36 HLS Master IC

It is a master IC compatible with HLS. It can be connected to the CPU using an 8 or 16-bit bus for use.

The MKY36 is a center IC (hereinafter referred to as "master") compatible with HLS (Hi-speed Link System). The MKY36 can be connected to the CPU using an 8-bit or 16-bit bus, allowing access from the CPU. Access to the MKY36 from the CPU can be handled similarly to SRAM, enabling the CPU to control communication and DIO simply by reading/writing to the MKY36's memory. The MKY36 has two receiving terminals (RXD1, RXD2), allowing it to control two RS-485 communication lines. Additionally, it is equipped with two interrupt terminals, enabling various interrupt functions such as input update interrupts and communication error occurrence interrupts. Besides these various interrupt functions, the MKY36 also incorporates a communication protocol, achieving communication functionality that reduces the load on the CPU.

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MKY37 HLS Slave IC 16DIN, 16DOUT

This is a slave IC for DI/O control compatible with HLS. It is equipped with 16-bit input terminals and 16-bit output terminals.

【DI: Input Operation】 Input data is automatically stored in the I/O control registers (DIN area) corresponding to each slave within the master IC. 【DO: Output Operation】 Output data is automatically output by writing to the I/O control registers (DOUT area) corresponding to each slave within the master IC.

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